MC14094BDG

MC14094BDG is an 8-level shift register, each level has a data latch, and each latch has a three-state output. The QS output data is shifted in subsequent negative clock transitions for use in low-speed cascaded systems. The data from each stage of the shift register is latched during the negative transition of the strobe input. The data is propagated through the latch, and the selection throughput is high. The output of the eight data latches is controlled by a tri-state buffer, which is placed in a high impedance state by a logic low level on the output enable. It can drive two low-power TTL loads or one low-power Schottky TTL load within the rated temperature range.